Comparative Analysis and Compensation of Power Quality Issues Using Diverse PLL Architectures

Author : SARITHA M

Abstract : Accurate detection of the Fundamental Frequency Positive Sequence (FFPS) is pivotal for effective power quality compensation in modern electrical grids. This paper presents a comparative analysis of diverse Phase-Locked Loop (PLL) architectures, focusing on their design principles, dynamic performance, and suitability for mitigating power quality issues. Advanced PLL configurations are evaluated under varying grid conditions, including harmonic distortion and frequency deviations, with emphasis on parameter optimization to enhance responsiveness and stability. The integration of these PLL systems with power quality compensators is explored to ensure precise synchronization and robust operation. Performance assessments are conducted through detailed simulations and experimental validation, revealing significant improvements in FFPS tracking accuracy and compensator effectiveness. The f indings underscore the critical role of optimized PLLs in enhancing grid reliability and pave the way for their deployment in smart grid environments and renewable energy systems.

Keywords : Phase-locked loop (PLL), fundamental frequency positive sequence (FFPS), power quality compensators, reference current generation, optimization, dynamic response.

Conference Name : National Conference on Electrical and Power Electronics (NCEPE-25)

Conference Place : Mumbai, India

Conference Date : 6th Dec 2025